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Si-based nanodevices - SINANO (»Add to Infobox)

Research Leader: Professor Mikael Östling
Docent Per-Erik Hellström, B. Gunnar Malm, Henry Radamson, Yong-Bin Wang

Integrated Devices and Circuits

SINANO aims to strengthen European scientific and technological excellence in the field of electronic, Si-based nanodevices for terascale integrated circuits. Over the next quarter century considerable challenges exist to push the limits of silicon integration down to nanometric dimensions. These can best be addressed by integration, at the European level, of the individually excellent research capabilities already existing in the main university and national research centres. SINANO's activities, with long-term and multidisciplinary objectives, could herald a revolution in IC technology, involving integration of nanoscale CMOS and emerging post-CMOS logic and memory devices. SINANO will work to enhance device performance and integration, to meet the ever-increasing demands of communications and computing. The network includes partners with expertise required to develop these advanced devices, from basic materials science through design and fabrication to characterisation and device modelling.

This ambitious programme will make Europe the world-leading centre for nanoelectronic devices - from fundamentals through to realisation, advancing this crucial technology to underpin the European economy over the coming decades. The joint programme of activities includes significant integrating activities: coordination of the partners' activities leading to the extension of specialisation, a joint technical research programme, sharing joint research platforms for processing and characterisation, management of knowledge, staff exchanges, electronic communication (e-mail, conferencing, website), activities to spread excellence (training researchers, students and technical staff, dissemination of results by open European Workshops). It is lead by a unified management structure comprising a Governing Board, Executive and Scientific Committee consisting of WP leaders and representatives of the main industrial partners, and WP leaders.

Period: 2004-01-01 - 2006-12-31

CMOS, Device simulation, Materials characterization, Nanoelectronics, Network, Integration


European Commission


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